The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current-limiting resistors to interface inputs to voltages over VCC.
Features:
- Inputs and outputs on opposite sides of the package allow an easy interface with microprocessors
- Useful as input or output port for microprocessors and microcomputers
- 3-state non-inverting outputs for bus-oriented applications
- The common 3-state output enables input
- The common 3-state output enables input
- Multiple package options
- Complies with JEDEC standard no. 7 A
Package Includes:
1 x 74HCT573D,653-NEXPERIA-Latch, HCT Family, 74HCT573, Transparent, Tri-State Non-Inverted, 20 ns, 6 mA, SOIC
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